Sr. Analog Layout Design Engineer
February 2007 — Present
Have been responsible for entire analog IP layout integration for USBPHY design's in various technologies ( 90nm, 45soi , 28nm, Internal technology etc )
Also implemented layout's of critical analog modules like high-speed transmitter,high-speed receiver,calibration logic and others.
Have been responsible for layout of all the modules for HDMI PHY including integration of entire analog section of HDMI PHY